bias tee calculator

Bias Tee Component Calculator

Estimate minimum coupling capacitor and RF choke values for a broadband bias tee.

Equations used:
Cmin = ratio / (2π · fmin · Z0)
Lmin = ratio · Z0 / (2π · fmin)

What is a bias tee?

A bias tee is a 3-port network that lets you inject DC power onto an RF line without significantly disturbing the RF signal path. It is commonly used to power active antennas, low-noise amplifiers (LNAs), remote RF front-ends, and microwave modules through the same coax cable carrying the RF signal.

The classic topology uses:

  • Series capacitor in the RF path (passes RF, blocks DC)
  • Shunt inductor (RF choke) on the DC feed (passes DC, blocks RF)
  • Bypass capacitors at the DC port to keep RF from leaking into the supply

How this bias tee calculator works

This calculator uses impedance-ratio design rules to generate practical starting values. The idea is simple:

  • The coupling capacitor reactance should be small compared to system impedance at the lowest operating frequency.
  • The choke reactance should be large compared to system impedance at the lowest operating frequency.

If you set a margin ratio of 10 in a 50 Ω system, the target at fmin becomes:

  • Capacitor reactance: about 5 Ω or less
  • Inductor reactance: about 500 Ω or more

This gives low insertion loss and good RF isolation in many real-world designs.

Design tips for real hardware

1) Check self-resonant frequency (SRF)

Inductors and capacitors stop behaving ideally at high frequency. Choose components with SRF safely above your highest RF frequency where possible.

2) Use multiple capacitors on the DC port

A common strategy is parallel bypass capacitors (for example 100 pF + 1 nF + 100 nF) to widen low-impedance decoupling across frequency.

3) Watch DC current and saturation

For the choke, ensure current rating exceeds expected DC load current with margin. Saturation reduces inductance and degrades RF isolation.

4) Layout matters

At VHF/UHF/microwave frequencies, trace inductance, via placement, and grounding dominate performance. Keep the RF path short, use a solid ground plane, and place decoupling parts close to the DC feed node.

Quick example

For a 50 Ω system from 100 MHz to 3 GHz with margin ratio 10:

  • Minimum capacitor is in the low hundreds of pF range
  • Minimum inductor is in the high hundreds of nH range
  • You can then pick nearby standard values and re-check reactance at 100 MHz

In practice, broadband bias tee design is often iterative: calculate, simulate (S-parameters), build, and measure.

FAQ

Can I just use larger L and C?

Not always. Very large parts may have lower SRF, higher ESR, or package parasitics that hurt high-frequency behavior. Bigger is not always better in RF design.

Does this replace full RF simulation?

No. This is a fast sizing tool for initial component selection. For demanding applications, use circuit and EM simulation, then verify with a VNA.

What about insertion loss and return loss?

Those depend on parasitics, component Q, PCB layout, connectors, and frequency span. This calculator provides first-pass values for coupling capacitor and RF choke, which are the core starting point.

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