PCB Via Current Calculator
Estimate via ampacity, required via count, resistance, voltage drop, and heating for plated through-hole vias in parallel.
Note: IPC-style value is a rough check only. For safety-critical/high-current designs, validate with thermal simulation, coupons, and manufacturer stackup limits.
What this PCB via current calculator tells you
When current jumps from one layer to another, the copper barrel inside a via becomes a tiny conductor. If the barrel is too thin or too few vias are used, you get extra IR drop, localized heat, and long-term reliability risk. This calculator gives a practical engineering estimate for:
- Current carrying capacity per via (from current density)
- How many vias you need for a target current
- Via resistance, voltage drop, and power dissipation
- A conservative IPC-style ampacity cross-check
How the calculator works
1) Copper cross-sectional area of the via barrel
The current path is the plated annulus of the via wall. We model it as:
2) Current density method
For quick design sizing, we apply a user-selected current density limit:
This is straightforward and transparent, and it makes margin planning easy.
3) Resistance and voltage drop
Via barrel resistance is estimated from copper resistivity and via length:
Resistivity is temperature-adjusted, then the parallel via group resistance is calculated as R_per_via / N.
4) IPC-style check (reference only)
The page also computes a conservative IPC-2221-like estimate using internal-conductor constant (k = 0.024):
This is included only as a sanity check; modern practice typically relies more on IPC-2152 data, field measurements, and thermal simulation.
Input guidance for real projects
Finished hole diameter
Use your fabricator’s finished hole value, not drill size. Finished hole is what remains after plating and process tolerances.
Plating thickness
Typical through-hole plating can vary widely by process class and manufacturer capability. If unsure, ask your board house for minimum guaranteed wall copper and use that worst-case value in this tool.
Board thickness (via length)
Thicker boards increase resistance because the current travels farther. Blind/buried vias may have much shorter lengths and lower drop.
Allowable current density
Lower values are more conservative and run cooler. Higher values may be acceptable in short bursts or if thermal spreading is excellent, but always verify with test data.
Practical PCB via ampacity design tips
- Use via arrays: Splitting current across multiple vias improves thermal behavior and lowers resistance.
- Shorten current path: Place transition vias close to source/load pads to reduce loop area and hot spots.
- Increase plating or hole size: Both increase barrel copper area.
- Check planes and neck-downs: The via may not be the only bottleneck; traces, spokes, and plane entries often dominate.
- Consider reliability: Thermal cycling fatigue can crack via barrels in high-stress zones.
- Validate with measurement: IR camera + 4-wire measurements on a prototype are worth the effort.
Common mistakes to avoid
- Assuming all vias share current perfectly (layout asymmetry often causes imbalance).
- Ignoring temperature rise in enclosed products with poor airflow.
- Using nominal plating thickness instead of minimum guaranteed fabrication value.
- Forgetting that via fill/cap structures can alter thermal and electrical behavior.
Bottom line
A good via current design balances electrical loss, thermal rise, manufacturability, and reliability margin. Use this calculator early in layout to size via groups, then close the loop with your PCB manufacturer and verification testing before release.